Assignment | Post Date | Submission Due Date (@11pm) |
---|---|---|
Assignment 1 and Reference Solution | Sept. 16 | Sept. 29 |
Assignment 2 and Reference Solution | Oct. 2 | Oct. 15 |
Assignment 3 | Oct. 16 | Oct. 29 |
Assignment 4 and Reference Solution | Nov. 18 | Dec. 1 |
Tutorials | Tutorial Dates | Submission Due Date (@11pm) |
Tutorial A: Quartus Prime _VHDL and light.vhd Tutorial A: Quartus Prime _Verilog and light.v Tutorial A Sbmission Requirements |
Sept. 13 | Sept. 19 |
Intel Tutorial B: ModelSim Simulator_VHDL Intel Tutorial B: ModelSim Simulator_Verilog Tutorial B Requirements |
Sept. 20 | Sept. 26 |
Intel Tutorial C: VHDL Testbench Intel Tutorial C: Verilog Testbench Tutorial C Requirements |
Oct. 4 | Oct. 10 |
Labs | Lab Dates | Submission Due Date (@11pm) |
Lab1: Fundamentals of Digital Design Download Mux_2 and Mux_4 here Download Mux_2.v , Mux_4.v and Pattern Detector with errorshere |
Sept. 27 PatternDetector Waveform Example |
Oct. 7 |
Lab2: Part a: Structural HDL and Testbenches | Oct. 11 | N/A |
Lab2: Part b: Sequential Multiplier | Oct. 18 | Oct. 31 |
Midterm Exam Review/Practice | Oct. 25 | -- |
Midterm Exam | Nov. 1 | -- |
Project | Work Sessions | Submission Due Date (@11pm) |
Project Introduction/Preparation: A. GCD Calculator; B. Dice Game ; C. Beamformer; D. The S-Machine Instruction Set Architecture |
In class |
--- |
Project A/B/C/D Report Guidelines and marking rubric |
Nov. 8, 22, 29 | Dec. 6 |
Project Presentation and marking rubric | Dec. 2, 3, 4 | ---- |
Software Installation:
Windows/Linux OS: Download Quartus Prime Lite Edition (v20) individual files:
Quartus Prime (2.0 GB), ModelSim-Intel FPGA (1.3GB), Cyclone V Device file (1.3 GB)
Note: Quartus v18 from ECED2200 also works, see Tutorial A for adding Cyclone V device support
Mac: Install a dual boot of Windows then install Quartus Prime Lite.
Hardware References:
For USB-Blaster II Driver installation, see Getting Started with Intel's DE-Series Boards
For I/O pin assignment, see pp. 25-26 of the DE1-SoC User Guide
For project ideas, check Intel FPGA Tutorials