Advanced MicroElectroMechanical Systems (A-MEMS) and Application Laboratory

ECED 4260

Assignment Post Date Submission Due Date (@11pm)
Assignment 1 and Reference Solution 1 Sept. 16 Sept. 30
Assignment 2 and Reference Solution 2
FSM VHDL code and Verilog code for Q4
FSM_Testbench and Verilog Testbench
Oct. 2 Oct. 16
Assignment 3 and Reference Solution 3 Oct. 26 Nov. 14
Assignment 4
Reference: Using Library Modules
FPGA Embedded Memory
Nov. 4 Nov. 27
Assignment 5 and Reference Solution 5 Nov. 23 Dec. 4
Tutorial / Lab / Project Lab Dates Submission Due Date (@11pm)
Tutorial A: Quartus Prime _VHDL and light.vhd
Tutorial A: Quartus Prime _Verilog and light.v
Tutorial A Sbmission Requirements
Sept. 12 Oct. 5
Intel Tutorial B: ModelSim Simulator_VHDL
Intel Tutorial B: ModelSim Simulator_Verilog
Tutorial B Requirements
Oct. 3 Oct. 5
Intel Tutorial C: VHDL Testbench
Intel Tutorial C: Verilog Testbench
Tutorial C Requirements
Oct. 17 Oct. 19
(Self-Practice) Lab2: Fundamentals of Digital Design
Download Mux_2 and Mux_4 here
PatternDetector Waveform Example
Lab3: Structual HDL and Testbench Oct. 24 Oct. 31
Intel Tutorial D: Timing Analyzer - VHDL
Intel Tutorial D: Timing Analyzer - Verilog
Tutorial D Requirements
Reference: Intel User Guide
Oct. 31
Understanding Timing Analysis Video
Nov. 6
Study Break
Tutorial E: Debugging Hardware - VHDL
Tutorial E: Debugging Hardware - Verilog
Tutorial E Requirements
Reference: SignalTap_VHDL and SignalTap_Verilog
Pin Assignment File
Nov. 14th Nov. 21st
Lab Q&A session Nov. 21 N/A
Lab Test Nov. 28 Nov. 28
Dice Game Presentation Dec. 5 (lecture time) N/A
Quiz #2 Dec. 6 (lecture time) N/A

Software Installation:

Windows/Linux OS: Download Quartus Prime Lite Edition (v20) individual files:

Quartus Prime (2.0 GB), ModelSim-Intel FPGA (1.3GB), Cyclone V Device file (1.3 GB)

Note: Quartus v18 from ECED2200 also works, see Tutorial A for adding Cyclone V device support

Mac: Install a dual boot of Windows then install Quartus Prime Lite.

Hardware References:

For USB-Blaster II Driver installation, see Getting Started with Intel's DE-Series Boards

For I/O pin assignment, see pp. 25-26 of the DE1-SoC User Guide

For project ideas, check Intel FPGA Tutorials